DIC_final_project/README.md

# Maze Solver - Digital Integrated Circuits Final Project

*A variable-size maze solver made in SystemVerilog, manufactured by TSMC in Spring 2026.*

See the [design report](./maze_solver_design_report.md) for details on chip and its implemenation.

![Final Chip Design](./media/final_chip.png)
Update README.md 2025-12-09 00:52:20 -05:00			`# Maze Solver - Digital Integrated Circuits Final Project`
Initial commit 2025-12-07 21:40:47 +00:00
Update README.md 2025-12-09 00:52:20 -05:00			`A variable-size maze solver made in SystemVerilog, manufactured by TSMC in Spring 2026.`

Fix README.md 2025-12-09 00:55:41 -05:00			`See the [design report](./maze_solver_design_report.md) for details on chip and its implemenation.`
Added chip design to README.md 2025-12-10 17:55:36 -05:00
			`![Final Chip Design](./media/final_chip.png)`