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A variable-size maze solver made in SystemVerilog, fabricated by TSMC in Spring 2026.
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  • SystemVerilog 100%
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Filename Latest commit message Latest commit date
Owen Dorweiler fb2b8b03c4 Finished initial report
2025-12-09 15:05:09 -05:00
media Rename "images" folder to "media" 2025-12-08 21:38:02 -05:00
chip_design_tb_working.sv Added comments 2025-12-07 18:00:45 -05:00
chip_design_working_variable.sv Added reset capability to stack mem 2025-12-09 14:17:09 -05:00
maze_solver_design_report.md Finished initial report 2025-12-09 15:05:09 -05:00
README.md Fix README.md 2025-12-09 00:55:41 -05:00

README.md

Maze Solver - Digital Integrated Circuits Final Project

A variable-size maze solver made in SystemVerilog, manufactured by TSMC in Spring 2026.

See the design report for details on chip and its implemenation.