// Code your testbench here
// or browse Examples
module chip_design_tb #(
  parameter int N_x = 8,
  parameter int N_y = 8,
  parameter int DELAY_NS   = 50
);


    logic clk, rst, start, input_enable;
    logic [3:0] cur_wall;
    logic done, req_next_addr, out_val;
    logic [3:0] next_x, next_y;
    logic [1:0] solution;


    logic [3:0] maze[0:N_x-1][0:N_y-1];


    chip_design chip_design_uut (
        .clk(clk),
      	.rst(rst),
        .start(start),
        .input_enable(input_enable),
        .cur_wall(cur_wall),
        .done(done),
        .req_next_addr(req_next_addr),
        .out_val(out_val),
      	.next_x(next_x),
        .next_y(next_y),
        .solution(solution)
    );


    initial begin

      	//"HARD" MAZE
        maze[0][0] = 4'b0011;
        maze[1][0] = 4'b1010;
        maze[2][0] = 4'b1010;
        maze[3][0] = 4'b1010;
        maze[4][0] = 4'b0010;
        maze[5][0] = 4'b1010;
        maze[6][0] = 4'b1010;
        maze[7][0] = 4'b0110;

        maze[0][1] = 4'b0101;
        maze[1][1] = 4'b1011;
        maze[2][1] = 4'b0110;
        maze[3][1] = 4'b0011;
        maze[4][1] = 4'b1100;
        maze[5][1] = 4'b0111;
        maze[6][1] = 4'b0111;
        maze[7][1] = 4'b0101;

        maze[0][2] = 4'b0101;
        maze[1][2] = 4'b0111;
        maze[2][2] = 4'b1001;
        maze[3][2] = 4'b1100;
        maze[4][2] = 4'b0011;
        maze[5][2] = 4'b1100;
        maze[6][2] = 4'b0101;
        maze[7][2] = 4'b0101;

        maze[0][3] = 4'b0101;
        maze[1][3] = 4'b0101;
        maze[2][3] = 4'b1011;
        maze[3][3] = 4'b0010;
        maze[4][3] = 4'b1000;
        maze[5][3] = 4'b0010;
        maze[6][3] = 4'b1100;
        maze[7][3] = 4'b0101;

        maze[0][4] = 4'b0101;
        maze[1][4] = 4'b1001;
        maze[2][4] = 4'b0110;
        maze[3][4] = 4'b1001;
        maze[4][4] = 4'b1110;
        maze[5][4] = 4'b1001;
        maze[6][4] = 4'b1010;
        maze[7][4] = 4'b0100;

        maze[0][5] = 4'b0101;
        maze[1][5] = 4'b0011;
        maze[2][5] = 4'b1000;
        maze[3][5] = 4'b0010;
        maze[4][5] = 4'b1010;
        maze[5][5] = 4'b0110;
        maze[6][5] = 4'b0111;
        maze[7][5] = 4'b0101;

        maze[0][6] = 4'b0101;
        maze[1][6] = 4'b1001;
        maze[2][6] = 4'b0110;
        maze[3][6] = 4'b1001;
        maze[4][6] = 4'b0110;
        maze[5][6] = 4'b1001;
        maze[6][6] = 4'b1100;
        maze[7][6] = 4'b0101;

        maze[0][7] = 4'b1001;
        maze[1][7] = 4'b0000;
        maze[2][7] = 4'b1001;
        maze[3][7] = 4'b1110;
        maze[4][7] = 4'b1001;
        maze[5][7] = 4'b1010;
        maze[6][7] = 4'b1010;   // GOAL CELL
        maze[7][7] = 4'b1100;
    end

    always #(DELAY_NS) clk = ~clk;


    always @(posedge clk) begin
        if(req_next_addr) begin
            cur_wall <= maze[next_x][next_y];
            input_enable <= 1;
        end else begin
            input_enable <= 0;
        end
    end


    initial begin
        $dumpfile("dump.vcd");
        $dumpvars;

        rst = 1;
        clk = 0;
        start = 0;
        input_enable = 0;

        repeat (5) @(posedge clk);
        rst = 0;

        start = 1;
        @(posedge clk);
        start = 0;

        wait(done == 1);
        $display("Maze solve complete!");

    	$finish;
	end

  	int output_count = 1;

	initial begin
  		forever begin
    		@(posedge out_val);

          	$display($sformatf("Move %0d: %b", output_count, solution));
    		output_count++;
  		end
	end
endmodule