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Added chip design to README.md

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Owen Dorweiler 2025-12-10 17:55:36 -05:00
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README.md
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*A variable-size maze solver made in SystemVerilog, manufactured by TSMC in Spring 2026.* *A variable-size maze solver made in SystemVerilog, manufactured by TSMC in Spring 2026.*
See the [design report](./maze_solver_design_report.md) for details on chip and its implemenation. See the [design report](./maze_solver_design_report.md) for details on chip and its implemenation.
![Final Chip Design](./media/final_chip.png)