From 136ede3e6421fdf85fba4d3cc85be3f96be600e7 Mon Sep 17 00:00:00 2001 From: Owen Dorweiler Date: Wed, 10 Dec 2025 17:54:09 -0500 Subject: [PATCH] Fixed spelling errors --- maze_solver_design_report.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/maze_solver_design_report.md b/maze_solver_design_report.md index 267d233..9056f8c 100644 --- a/maze_solver_design_report.md +++ b/maze_solver_design_report.md @@ -13,10 +13,10 @@ ## 1. High-Level Chip Purpose & Design -The chip is able to solve a maze, outputting the correct sequence of moves (up, down, left, right) needed to traverse the maze without any dead ends. It accomplishes this by requesting cell locations from off-chip memory and intaking their wall configurations as a 4-bit input. +The chip is able to solve a maze, outputting the correct sequence of moves (up, down, left, right) needed to traverse the maze without any dead ends. It accomplishes this by requesting cell locations from off-chip memory and accepting their wall configurations as a 4-bit input. - As the chip moves around the maze, it requests new memory locations until it reaches the end of the maze. - The chip may take dead-end paths, but its solution does not include any dead ends due to the implementation of a hardware stack. - - Once it eaches the end, the chip outputs the solution as a series of 2-bit numbers corresponding to the series of moves (up, right, down, left) needed to successfully traverse the maze. + - Once it reaches the end, the chip outputs the solution as a series of 2-bit numbers corresponding to the series of moves (up, right, down, left) needed to successfully traverse the maze. ### Inputs & Outputs